EVALUATION OF RESPONSE TIME AND JITTER IN REAL-TIME EMBEDDED SYSTEMS ESP32-S3: Issue 15-Journal of Applied Science September (2025)

Abstract

This paper presents a hardware-based experimental evaluation of latency and jitter on an ESP32-S3 running FreeRTOS. Four scenarios were examined on a physical development board: baseline single-task execution (S1), concurrent multi-task scheduling (S2), unprotected shared-resource contention (S3), and contention with the Priority Inheritance Protocol (S4). Interrupt-to-task latency was measured with microsecond-resolution software timestamps, and mean, minimum and maximum latency, standard deviation, mean jitter and maximum jitter were computed for 10,000 samples per scenario. The baseline showed a mean latency of 719.57 μs and a mean jitter of 0.49 μs. Concurrent scheduling raised the mean jitter to 2.57 μs, with occasional outliers. Unprotected contention produced the largest variability (mean jitter 88.93 μs, maximum jitter 164.89 μs). Priority Inheritance changed the results only marginally (mean jitter 87.28 μs; standard deviation 89.52 μs against 91.18 μs) and did not reduce the maximum jitter (167.27 μs). The results show that scheduling and synchronization design strongly affect temporal predictability on low-cost embedded platforms, and the methodology offers a reproducible basis for further evaluation.